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离子注入技术,由于它的许多优点,已经证明它是提高半导体器件和集成电路性能的重要新技术。如“集成注入逻辑运算电路的分析、设计与试制”一文(见本期20页)中所分析的,注入逻辑电路中两个关键参数是反向运用的npn晶体管共射极电流增益β和横向pnp晶体管的共基极电流放大系数a。当我们进一步考虑提高注入逻辑电路的速度时,高精度的光刻和浅结是必不可少的。另外,由于npn是反向运用,扩散基区的减速场也是fт较低的一个重要因素。基于上面的考虑,又考虑到离子注入技术可以获得可控的杂质分布(甚至反向加速场)、均匀平坦的结面,更薄的基区和相对高的有源基区电导等等。我们在北京师大等兄弟单位的大力协助下,对离子注入技术应用于注入逻辑电路的工作进行了探讨。
Ion implantation technology, due to its many advantages, has proven to be an important new technique for improving the performance of semiconductor devices and integrated circuits. As analyzed in “Analysis, Design and Prototyping of Integrated Injection Logic Operation Circuit” (page 20), the two key parameters injected into the logic circuit are the npn transistor common emitter current gain β and the horizontal pnp transistor common base current amplification factor a. When we further consider increasing the speed of the logic into the logic, high-precision lithography and shallow junctions are essential. In addition, since npn is used in reverse, the deceleration field of the diffusion base is also an important factor for the lower f. Based on the above considerations, it is also considered that ion implantation technology can achieve controlled impurity distribution (even reverse acceleration field), even and flat junction, thinner base region and relatively high active base region conductance and the like. With the help of our brother units such as Beijing Normal University, we discussed the application of ion implantation technology in the logic injection circuit.