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研究了用通常模拟电路元件集成的I~2L(集成注入逻辑)结构的制造工艺、交流和直流特性。因为要求模拟电路的击穿电压,所以要正确地选取硅外延层的电阻率和厚度。研究了I~2L结构的参数性能,以达到通常的线性电路电压。提出了各种不同材料类型构成的I~2L结构的设计准则,制造工艺和器件性能。 在线性兼容的工艺中,I~2L所达到的性能。在标准器件击穿为20伏时,允许有四个输出端和门传输延迟时间不低于50毫微秒,但是对于得到30伏的击穿,输出端被限制到三个和门延迟时间到100毫微秒。
The manufacturing process, the AC and DC characteristics of the I ~ 2L (Integrated Implantation Logic) structure integrated with typical analog circuit components are investigated. Because of the requirement of the breakdown voltage of the analog circuit, the resistivity and thickness of the silicon epitaxial layer should be correctly chosen. The parametric performance of I ~ 2L structures has been studied to achieve the usual linear circuit voltage. Proposed a variety of different types of material structure I ~ 2L design guidelines, manufacturing processes and device performance. In a linear compatible process, I ~ 2L achieved the performance. With a standard device breakdown of 20 volts, four output and gate transfer delay times of no less than 50 ns are allowed, but for a breakdown of 30 volts the output is limited to three AND gate delay times 100 nanoseconds.