用于肖特基势垒砷化镓场效应晶体管的多层外延技术

• 作 者: T.Nozaki 李中南
• 出 处: 半导体情报
• 发表日期: 2004年期
• 关键词: 肖特基势垒 深能级杂质 有源层 缓冲层 千兆赫 外延层 噪声系数 多层结构 衬底 外延片

为了避免迁移率的降低和接近 GaAs 外延层-衬底界面的深能级杂质的影响,对有源层与衬底间嵌入一个高电阻率缓冲层进行了考查。用一种改进的 Ga(Sn)—AsCl_3—H_2反应系统连续外延生长法,可在掺铬衬底上得到包括高电阻率层和有源层的多层结构。在多层外延片上制成了1微米肖特基势垒栅 GaAsFET。直流和射频特性可得到明显改善,f_(max)为60千兆赫,在6千兆赫下可得到2.5分贝的 NF(噪声系数)及约20分贝的 MAG(最大可用增益)。

In order to avoid the decrease of mobility and the influence of the deep level impurity close to the GaAs epitaxial layer-substrate interface, a high resistivity buffer layer is embedded between the active layer and the substrate. Using an improved Ga (Sn) -AsCl 3 -H 2 reaction system, a continuous epitaxial growth method can be used to obtain a multilayer structure including a high resistivity layer and an active layer on a chromium-doped substrate. A 1 micron Schottky barrier GaAsFET is fabricated on a multi-layered epitaxial wafer. The DC and RF characteristics are significantly improved with f max of 60 GHz, NF of 2.5 dB at 6 GHz and MAG of about 20 dB at maximum available gain.