Variation tolerance for high-speed negative capacitance FinFET SRAM bit cell

• 作 者: Yaqian Qian Shushan Qiao Rongqiang Yang
• 机 构: University of Chinese Academy of Science, Beijing 100049, China“,”Institute of Microelectronics of t
• 出 处: 半导体学报（英文版）
• 发表日期: 2020年6期
• 关键词: negative-capacitance FinFET (NC-FinFET) SRAM variation noise margin speed

Negative capacitance FinFET (NC-FinFET) has a promising developmental prospect due to its superior performance in SS ＜ 60 mV/dec (subthreshold swing),especially in SRAM.Noise margin is an important metric to evaluate the performance for SRAM,together with static leakage,read speed,etc.In this paper,we study the effects of the variation of ferroelectric material (thickness,polarization),FinFET critical physical parameters (fin number,channel length) and some ambient factors (working temperature,supply voltage) on the performance of NC-FinFET SRAM within the reasonable fluctuation tolerance range.The SRAM bit cell is analyzed with a basic 6T structure.The impact of fin number and channel length for NC-FinFET SRAM is different from that of conventional FinFETs.Additionally,the ferroelectric material and some other factors are assessed in detail.