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本文要报导一种采用高密度硅栅本体CMOS工艺和基本的6管CMOS RAM 单元电路的全静态16K CMOS RAM。存贮器的典型存取时间为95毫微秒,动态功耗200毫瓦,静态功耗小于1毫瓦。 用双层多晶硅MOS工艺已经能够制造带多晶硅负载的16K静态RAM。但是这种RAM的静态电流比较大,这是因为负载电阻要保持低的数值,以弥补工艺上的起伏。另一方面,6管的CMOS RAM单元却有许多优点,尤其是工作范围宽,静态功耗低。可是因为单元是由四个NMOS管交叉耦合的触发器和两个PMOS负载管组成的,从而使单元面积增加,这样要使16K CMOS RAM达到所要求的器件性能,就要用特别紧的布线标准。
This article reports on a fully static 16K CMOS RAM using a high-density, SiGe-based CMOS process and a basic six-transistor CMOS RAM cell circuit. Typical memory access time is 95 nanoseconds, dynamic power 200 milliwatts, static power consumption is less than 1 milliwatts. The 16K static RAM with polysilicon load has been able to be manufactured using a double-poly polysilicon MOS process. However, the quiescent current of this RAM is relatively large, because the load resistance needs to be kept low to make up for the process fluctuations. On the other hand, the six-transistor CMOS RAM unit has many advantages, especially the wide operating range and low static power consumption. However, since the cell is made up of four NMOS-tube-cross-coupled flip-flops and two PMOS load tubes, the cell area is increased so that for a 16K CMOS RAM to achieve the required device performance, a very tight wiring standard .