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在这篇文章中我们提出了一种用于突发方式系统的时钟恢复技术，它完成时钟相位恢复，突发同步（确定突发中的第一数据比特）和定时告警产生（在指定的时隙内维持突发）的功能。其方式是基于使用相关算法，此法中包含“０１０”比特序列的输入序列头由多个时钟相位采样，并同已存贮的相同序列的时延版本进行相关计算。这个方法已在一个０．７μｍＣｍｏｓ专用集成电路（ＡＳＩＣ）中实现，已进行了在３８～９０ＭＨＺ频率范围内相位跟踪特性的测量，在突发方式光接收机中使用这个器件工作在５１．８４Ｍｂ／Ｓ的比特误码率测量也已完成，测量中我们发现器件工作良好可以完成时钟提取．同理想的时钟提取系统相比的劣化２ｄＢ。
In this article we propose a clock recovery technique for a burst mode system that completes clock phase recovery, burst synchronization (determining the first data bit in a burst), and timing alarm generation (at a given time Gap to maintain the sudden) function. The method is based on the use of correlation algorithms in which the input sequence header containing the “010” bit sequence is sampled by multiple clock phases and correlated with the stored time-delayed version of the same sequence. This method has been implemented in a 0.7μmCmos application specific integrated circuit (ASIC) and has been measured for phase tracking over a frequency range of 38-90MHz. The use of this device in a burst mode optical receiver operates at 51.84Mb / S bit error rate measurement has been completed, the measurement we found that the device is working well to complete the clock extraction. Degradation of 2dB compared to the ideal clock extraction system.