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在深亚微米设计中,降低能耗和传播延迟是片上全局总线所面对的两个最主要设计目标.本文提出了一种用于片上全局总线的时空编码方案,它既提高了性能又降低了峰值能耗和平均能耗.该编码方案利用空间总线倒相编码和时间编码电路技术的优点,在消除相邻连线上反相翻转的同时,减少了自翻转数和耦合翻转数.在应用该总线编码技术降低总线延时和能耗的设计中,给出了一种总线上插入中继驱动器的设计方法,以确定它们合适的尺寸和插入位置,使得在满足目标延时和翻转斜率要求的同时总线总的能耗最小.该方法可用来为各种编码技术获得翻转斜率约束下的总线能耗与延时的优化折中.
In deep sub-micron designs, reducing energy consumption and propagation delay are the two main design goals faced by on-chip global buses.This paper presents a space-time coding scheme for on-chip global buses that increases both performance and latency The peak energy consumption and the average energy consumption of the encoding scheme using the advantages of space bus inversion encoding and time coding circuit technology to eliminate reverse connection on the adjacent flip, while reducing the number of self-flip and the number of coupling flip in In the design of bus delay and power consumption reduction using this bus coding technique, a design method of inserting a relay driver on a bus is given to determine their proper size and insertion position, so that when the target delay and the flip slope The total bus energy consumption is minimized at the same time as required, and this method can be used to optimize the bus energy consumption and delay for a variety of encoding techniques with the flip slope constraints.