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随着晶体管向10nm、7nm甚至更小尺寸的发展,半导体行业面临着真正的材料选择困扰。基板、沟道、栅和接触材料都迫切需要评估。“在14nm,10nm工艺时代,器件架构是确定的。”Intermolecular有限公司半导体部门高级副总裁兼总经理RajJammy表示,“大多数情况下采用FinFET架构,当然也有其它选项,如完全耗尽型绝缘硅(SOI)。”对于10nm和7nm来说,Jammy认为高K值金属栅将占主导地位,但真正的挑战将是沟道本身在节点锗很可能成为沟道材料之一
With the transistor to 10nm, 7nm or smaller size development, the semiconductor industry is facing a real problem of material selection. The substrate, trench, gate and contact materials are in urgent need of evaluation. “At 14nm and 10nm process times, the device architecture is certain.” Raj Jammy, senior vice president and general manager for semiconductors at Intermolecular Inc., said: “FinFETs are mostly used, and of course there are other options like full depletion Type silicon-on-insulator (SOI). ”Jammy said high-k metal gates will dominate 10nm and 7nm, but the real challenge will be that the channel itself at the node germanium is likely to be one of the channel materials