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为解决高速网络测量中面临的如何平衡测量速度、精度与存储器容量的问题,采用自适应非线性采样方法,基于高速现场可编程门阵列(FPGA)硬件平台,研究了针对高速网络流量的测量装置FAST.通过控制状态机设计、存储器功能划分和并行回导设计,FAST原型系统可根据实时流量动态调整采样概率,在较高的计数器压缩率下,保持99%以上的平均测量精度,分组测量吞吐量达27.4 Mpps.
In order to solve the problem of how to balance the measurement speed, accuracy and memory capacity in high-speed network measurement, an adaptive non-linear sampling method and a hardware platform based on high-speed field programmable gate array (FPGA) FAST. By controlling state machine design, memory partitioning, and parallel backtracking, the FAST prototyping system dynamically adjusts sampling probabilities based on real-time traffic and maintains over 99% average measurement accuracy at high counter compression rates. Packet measurement throughput Up to 27.4 Mpps.