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Two innovative techniques for manufacturing 0.1 micron MOSFETs are described. On e is SiO_2-resist overetching method, in which an additional SiO_2 layer is use d to short the gate length; the other is dual-exposure method, according to w hich two overlapped masks are exposed in a single lithography. Both of them are easy to implement,without any special processing technologies required.The layou t used in a real process is introduced. As a result, MOSFETs with minimal channe l length of 0.12 micron are obtained. Also, the test results on characteristic a re given. Finally, a conclusion is drawn that in 0.1 micron scale, both saturation currents and transconductorance of MOSFETs increase, while substrate currents de crease when channel length diminish.
Two innovative techniques for manufacturing 0.1 micron MOSFETs are described. On e is a SiO_2-resist overetching method, which an additional SiO 2 layer is use d to short the gate length; the other is dual-exposure method, according to w hich two overlapped masks Both of them are easy to implement, without any special processing technologies required. The layou t used in a real process is introduced. As a result, MOSFETs with minimal channe l length of 0.12 micron are obtained. , the test results on characteristic a re given. Finally, a conclusion is drawn that 0.1 in 0.1 micron scale, both saturation currents and transconduction of MOSFETs increase, while substrate currents de crease when channel length diminish.