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在器件单元的第1层上生长1层或更多层,可以提高集成电路的密度。 这种用Si作衬底的多层集成电路结构,可按下列步骤制得: (A)制得第1层集成电路结构(图1)后,用低温淀积法在其表面覆盖一层2000—3000A的氧化层或氮化层2。此层作绝缘用。 (B)用低温化学汽相淀积法或真空电子束蒸发法,在氧化层/氮化层上淀积1—2μm厚的无定形硅(a—Si)或多晶硅(Poly—Si)层3。
Growing one or more layers on the first layer of the device cell can increase the density of the integrated circuit. The Si-based multilayer integrated circuit structure can be obtained by the following steps: (A) After the first-level integrated circuit structure is formed (FIG. 1), the surface of the multi-layered integrated circuit structure is covered by a low temperature deposition method 2000 -3000A oxide layer or nitride layer 2. This layer for insulation. (B) A 1-2 μm-thick amorphous silicon (a-Si) or poly-Si layer 3 is deposited on the oxide layer / nitride layer by a low-temperature chemical vapor deposition method or a vacuum electron beam evaporation method .