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打倒了“四人帮”我国电子工业的发展进入了新时期,特别是电子计算技术的迅猛发展对新型的半导体存储器的研制提出了迫切的要求。为了配合我省微小型计算机的研制,我们结合74届学员的毕业设计,在南京无线电研究所进行了P沟硅等平面256位MOS动态机存储器的设计试制工作。 在设计时我们的指导思想是:（1）尽量利用南厅MOS工艺的已有条件,力争在半年毕业设计时间中完成设计试制工作,以期达到既出产品又出人才的目的;（2）优先考虑电路的稳定性和可靠性,然后争取有较好的其他性能;（3）积累经验,为今后设计研制更先进的沟硅存储器等新产品创造条件。 在设计方案上我们考虑了如下几点:（1）采用P沟栅等平面工艺,因为P沟工艺较成熟,易做出结果,硅栅工艺有利于缩小芯片面积和提高速度,等平面工艺有利于提高成品率;（2）采用器管动态单元、以期提高电路的可靠性和稳定性;降低电路功耗,同时采用了译码器接地管和驱动器自电路,目的亦是为了降低功耗和提高速度。电路概况如下:电路特点:动态器管单元工艺特点:P沟硅栅等平面电路结构:256字×1位芯片面积:2.5mm×2.5mm（包括压焊块） 2mm×2mm（不包括压焊块）电路框见（1.1）芯片中集成了:16×16=256个存储单元x地址反相器 A_0～A_3（共4只）
Down with the “Gang of Four” The development of China’s electronic industry has entered a new era. In particular, the rapid development of electronic computing has raised urgent requirements for the development of new-type semiconductor memories. In order to tie in with the development of our province’s minicomputer, we combined the design of the graduates of the 74th session with the trial design and manufacture of 256-bit MOS dynamic memory such as P-type silicon in Nanjing Institute of Radio. In the design of our guiding ideology are: (1) make full use of the existing conditions of the South Hall MOS technology, and strive to complete the design and trial production in half a year of graduation design time, in order to achieve the purpose of both products and talents; (2) give priority to Circuit stability and reliability, and then strive for better performance; (3) to accumulate experience and create conditions for the future design and development of more advanced silicon memory and other new products. In the design of the program we consider the following points: (1) the use of P-groove gate and other planar technology, because the P-groove technology is more mature, easy to make results, silicon gate technology is conducive to reducing the chip area and increase speed, Conducive to improving the yield; (2) the use of tube dynamic unit, with a view to improve the reliability and stability of the circuit; reduce circuit power consumption, while using the decoder ground tube and driver self circuit, the purpose is also to reduce power consumption and accelerate. The circuit is summarized as follows: Circuit Features: Dynamic tube unit Process features: P groove silicon gate and other planar circuit structure: 256 words × 1 chip area: 2.5mm × 2.5mm (including the pad) 2mm × 2mm Block) See circuit block (1.1) Integrated in the chip: 16 × 16 = 256 memory locations x address inverter A_0 ~ A_3 (total 4)