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短沟效应将成为限制ＭＯＳ器件进一步缩小的主要因素。利用求解Ｐｏｉｓｓｏｎ方程的变分方法对短沟效应进行了分析，导出了表征器件短沟效应的自然沟长尺度表达式。同时考虑了栅介质、沟道耗尽层和埋层ＳｉＯ２中的二维效应，结果只与边界条件与长沟解的差有关，具有清晰的物理意义。均匀掺杂沟道体硅ＭＯＳＦＥＴ、本征掺杂沟道体硅ＭＯＳ－ＦＥＴ、常规ＳＯＩＭＯＳＦＥＴ和双栅ＳＯＩＭＯＳＦＥＴ的短沟效应数值模拟比较结果与模型结论完全一致。表明模型能对不同器件结构的细致差别正确模拟。研究结果为设计抑制短沟效应的新型器件提供了指导。
Short-ditch effect will become the main factor limiting the further narrowing of MOS devices. The variational method to solve the Poisson equation is used to analyze the short-groove effect, and the long-scale expression of the natural groove which characterizes the short-groove effect of the device is derived. Considering the two-dimensional effect of gate dielectric, channel depletion layer and buried SiO2, the results are only related to the difference between the boundary conditions and the long-channel solution and have clear physical meaning. The numerical results of the numerical simulation of the short-channel effect of the uniformly doped channel body silicon MOSFET and the intrinsic doped channel body silicon MOS-FET, the conventional SOIMOSFET and the double-gate SOIMOSFET are completely consistent with the model conclusions. It shows that the model can accurately simulate the detailed differences of different device structures. The results provide guidance for the design of new devices that suppress the ditch effect.