论文部分内容阅读
We propose a novel backgate sandwich nanowire MOSFET(SNFET), which offers the advantages of ETSOI(dynamic backgate voltage controllability) and nanowire FETs(good short channel effect). A backgate is used for threshold voltage(Vt) control of the SNFET. Compared with a backgate Fin FET with a punch-through stop layer(PTSL), the SNFET possesses improved device performance. 3D device simulations indicate that the SNFET has a three times larger overdrive current, a 75% smaller off leakage current, and reduced subthreshold swing(SS) and DIBL than those of a backgate Fin FET when the nanowire(NW) and the fin are of equal width.A new process flow to fabricate the backgate SNFET is also proposed in this work. Our analytical model suggests that Vtcontrol by the backgate can be attributed to the capacitances formed by the frontgate, NW, and backgate.The SNFET devices are compatible with the latest state-of-the-art high-k/metal gate CMOS technology with the unique capability of independent backgate control for n FETs and p FETs, which is promising for sub-22 nm scaling down.
We propose a novel backgate sandwich nanowire MOSFET (SNFET), which offers the advantages of ETSOI (dynamic backgate voltage controllability) and nanowire FETs (good short channel effect). A backgate is used for threshold voltage (Vt) control of the SNFET. with a backgate Fin FET with a punch-through stop layer (PTSL), the SNFET possesses improved device performance. 3D device simulations indicate that the SNFET has a three times larger overdrive current, a 75% smaller off leakage current, and reduced subthreshold swing (SS) and DIBL than those of a backgate Fin FET when the nanowire (NW) and the fin are equal width. A new process flow to fabricate the backgate SNFET is also proposed in this work. Our analytical model suggests that Vtcontrol by the backgate can be attributed to the capacitances formed by the frontgate, NW, and backgate. SNFET devices are compatible with the latest state-of-the-art high-k / metal gate CMOS technology with the unique capability of independent backga te control for n FETs and p FETs, which is promising for sub-22 nm scaling down.