SYSTEMATIC DESIGN OF SINGLE CARRIER OVERLAP FREQUENCY DOMAIN EQUALIZATION

来源 :Journal of Systems Science & Complexity | 被引量 : 0次 | 上传用户:3pei
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This paper proposes a systematic design method of overlap frequency domain equalization(FDE) for single carrier (SC) transmission without a guard interval (GI).Based on the analysis of signal-to-interference-plus-noise ratio (SINR) of the equalizer output for each symbol,the authors adaptivelydetermine the block of the overlap FDE,where the block is defined as a set of symbols at the equalizeroutput with sufficiently low error rate,for a certain fixed sliding window size,which corresponds toa fast Fourier transform (FFT) window size.The proposed method takes advantage of the fact thatthe utility part of the equalized signal is localized around the center of the FFT window.In addition,the authors also propose to adjust the block size in order to control the computational complexity ofthe equalization per processed sample associating with the average bit error rate (BER) of the system.Simulation results show that the proposed scheme can achieve comparable BER performance to theconventional SC-FDE scheme with sufficient GI insertion for both the coded and uncoded cases withvarious modulation levels,while requiring lower computational complexity compared to the SC overlapFDE transmission with the fixed block. This paper proposes a systematic design method of overlap frequency domain equalization (FDE) for single carrier (SC) transmission without a guard interval (GI). Based on the analysis of signal-to-interference-plus-noise ratio equalizer output for each symbol, the authors adaptivelydetermine the block of the overlap FDE, where the block is defined as a set of symbols at the equalizer output with sufficiently low error rate, for a certain fixed sliding window size, which corresponds to a fast Fourier transform ( FFT) window size.The proposed method takes advantage of the fact that the utility part of the equalized signal is localized around the center of the FFT window. In addition, the authors also propose to adjust the block size in order to control the computational complexity ofthe equalization per processed sample associating with the average bit error rate (BER) of the system.Simulation results show that the proposed scheme can achieve comparable BER performance to theconvention al SC-FDE scheme with sufficient GI insertion for both the coded and uncoded cases withvarious modulation levels, while requiring lower computational complexity compared to the SC overlapFDE transmission with the fixed block.
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