Modeling of trap-assisted tunneling on performance of charge trapping memory with consideration of t

• 作 者: 伦志远 李云 赵凯 杜刚 刘晓彦 王漪
• 机 构: Institute of Microelectronics, Peking University,School of Information and Communication, Beijing In
• 出 处: Chinese Physics B
• 发表日期: 2016年08期
• 关键词: tunneling trapping retention operations capture modeled normalized positions vol

In this work, the trap-assisted tunneling(TAT) mechanism is modeled as a two-step physical process for charge trapping memory(CTM). The influence of the TAT mechanism on CTM performance is investigated in consideration of various trap positions and energy levels. For the simulated CTM structure, simulation results indicate that the positions of oxide traps related to the maximum TAT current contribution shift towards the substrate interface and charge storage layer interface during time evolutions in programming and retention operations, respectively. Lower programming voltage and retention operations under higher temperature are found to be more sensitive to tunneling oxide degradation.

The influence of the TAT mechanism on CTM performance is investigated in various of the trap positions and energy levels. In this work, the trap-assisted tunneling (TAT) mechanism is modeled as a two-step physical process for charge trapping memory . For the simulated CTM structure, simulation results indicate that that the positions of oxide traps related to the maximum TAT current contribution shift towards the substrate interface and charge storage layer interface during time evolutions in programming and retention operations, respectively. Lower programming voltage and retention operations under higher temperature are found to be more sensitive to tunneling oxide degradation.