Altera发布高端Stratix III FPGA提供可编程功耗技术

• 出 处: 电子技术
• 发表日期: 2006年12期
• 关键词: Stratix Altera 可编程逻辑器件 Quartus 软件改进 功耗 硬件体系结构 器件 工艺技术 QuartusII

Altera公司最新发布Stratix III FPGA系列,该系列具有在业界高密度高性能可编程逻辑器件中最低的功耗。Stratix III FPGA采用了TSMC的65nm工艺技术,其根本性创新包括硬件体系结构提升和Quartus II软件改进,与前一代Stratix II器件相比,这些新特性使功耗降低了50%,性能提高了25%,密度是其两倍。

Altera Corporation announces the Stratix III FPGA family, which features the lowest power consumption in the industry’s high-density, high-performance programmable logic devices. Stratix III FPGAs use TSMC’s 65nm process technology with fundamental innovations including hardware architecture enhancements and Quartus II software improvements that reduce power consumption by 50% and improve performance by 25% compared to previous generation Stratix II devices %, Its density is doubled.