VLSI implementation of MIMO detection for 802.11n using a novel adaptive tree search algorithm

• 作 者: 尧横 鉴海防 周立国 石寅
• 机 构: Institute of Semiconductors,Chinese Academy of Sciences,
• 出 处: Journal of Semiconductors
• 发表日期: 2013年10期
• 关键词: wideband latency throughput requirement architectural floating transmitter trave

A 4×4 64-QAM multiple-input multiple-output(MIMO) detector is presented for the application of an IEEE 802.11n wireless local area network.The detector is the implementation of a novel adaptive tree search(ATS) algorithm,and multiple ATS cores need to be instantiated to achieve the wideband requirement in the 802.11n standard.Both the ATS algorithm and the architectural considerations are explained.The latency of the detector is 0.75 μs,and the detector has a gate count of 848 k with a total of 19 parallel ATS cores.Each ATS core runs at 67 MHz.Measurement results show that compared with the floating-point ATS algorithm,the fixed-point implementation achieves a loss of 0.9 dB at a BER of 10-3.

A 4 × 4 64-QAM multiple-input multiple-output (MIMO) detector is presented for the application of an IEEE 802.11n wireless local area network. The detector is the implementation of a novel adaptive tree search (ATS) algorithm, and multiple ATS cores need to be instantiated to achieve the wideband requirement in the 802.11n standard. Both the ATS algorithm and the architectural considerations are. The latency of the detector is 0.75 μs, and the detector has a gate count of 848 k with a total of 19 parallel ATS cores. EACH ATS core runs at 67 MHz. Measurement results show that compared with the floating-point ATS algorithm, the fixed-point implementation achieves a loss of 0.9 dB at a BER of 10-3.