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A novel lateral double-gate tunnelling field effect transistor (DG-TFET) is studied and its performance is presented by a two-dimensional device simulation with code ISE. The result demonstrates that this new tunnelling transistor allows for the steeper sub-threshold swing below 60mV/dec, the super low supply voltage (operable at VDD ＜ 0.3 V) and the rail-to-rail logic (significant on-state current at the drain-source voltage VDS = 50 mV)for the aggressive technology assumptions of the availability of high-k/metal stack with equivalent gate oxide thickness EOT =0.24 nm and the work function difference 4.5eV of materials.