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随着高速集成电路的发展,对时滞测试的研究越来越重要了,时滞测试的主要困难来自于与电路的门数成指数增长的庞大通路数,以及大量的时滞不可测通路.本文提供了一种使用双倍可变观测点进行时滞测试的方法,保证了只需要测试少量通路就能完成整个电路的时滞测试.它所付出的代价是:对每一个测试向量对,测试仪需要在原始输出采样两次以确定预期跳变的传输时间.此方法所需测试的通路数与被测电路的门数成线性增长关系,从而很大程度上简化了时滞测试
With the development of high-speed integrated circuits, the research of time-delay test is more and more important. The main difficulty of the time-delay test comes from the large number of channels which exponentially increase with the number of circuits and a large number of time-delay unmeasured channels. This article provides a method for time-lag testing using double variable observation points to ensure that only a small number of channels can be tested to complete the delay test of the entire circuit. The price it pays for each pair of test vectors, The tester needs to sample twice the original output to determine the expected transit time of the transfer.The number of paths required for this method to test is linearly related to the number of gates in the circuit under test, greatly simplifying the time lag test