【摘 要】
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Ferroelectric hysteresis loop measurement under high driving frequency generally faces great challenges.Parasitic factors in testing circuits such as leakage current and RC delay could result in abnormal hysteresis loops with erroneous rem-nant polarizati
【机 构】
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Key Laboratory of Microelectronics Device & Integrated Technology,Institute of Microelectronics of C
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Ferroelectric hysteresis loop measurement under high driving frequency generally faces great challenges.Parasitic factors in testing circuits such as leakage current and RC delay could result in abnormal hysteresis loops with erroneous rem-nant polarization (Pr) and coercive field (Ec).In this study,positive-up-negative-down (PUND) measurement under a wide fre-quency range was performed on a 10-nm thick Hf0.sZr0.sO2 ferroelectric film.Detailed analysis on the leakage current and RC delay was conducted as the polarization switching occurs in the FE capacitor.After considering the time lag caused by RC delay,reasonable calibration of current response over the voltage pulse stimulus was employed in the integral of polarization current over time.In such a method,rational P-Vloops measured at high frequencies (＞1 MHz) was successfully achieved.This work provides a comprehensive understanding on the effect of parasitic factors on the polarization switching behavior of FE films.
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