【摘 要】
：
SRAM-based FPGA is widely applied in the field of aerospace,whose anti-SEU capability becomes more and more important.To improve anti-FPGA SEU capability,the registers of the circuit netlist are tripl
【机 构】
：
Automatic Test and Control Institute,Harbin Institute of technology,Harbin,150001;Institute of Elect
【出 处】
：
The 4th International Workshop on Advanced Technologies in P
论文部分内容阅读
SRAM-based FPGA is widely applied in the field of aerospace,whose anti-SEU capability becomes more and more important.To improve anti-FPGA SEU capability,the registers of the circuit netlist are tripled and divided into three categories in this paper.By the packing algorithm,the registers of triple modular redundancy are loaded into different configurable logic block.At the same time,the packing algorithm considers the effect of large fan-out nets.The experimental results show that the algorithm successfully realize the packing of the register of TMR.Comparing with TVPACK,the algorithm in this paper is able to obtain a 11%reduction of the number of the nets in critical path,and a 12%reduction of the time delay in critical path delay on average when TMR is not considered.Especially,some critical path delay of circuit can be improved about 33%.
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