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TDC1008J、TDC1009J、TDC1010J并行8位、12位、16位的乘法器——累加器(MAC_S)(以下简称乘——加器)是高速的TTL(晶体管——晶体管逻辑)LSI(大规模集成电路)器件。这些器件的低功率和高性能是TRW公司所研究的业已得到证实的新方法的结果。内电路的速度——功率性能达到了每个等效门低于1微微焦耳的水平。这些多功能的算术单元能执行N×N位的乘法和乘积累加。数制可以是2的补码或不带符号的数。输出内容能与下次乘积相加或相减,或者累加功能可只对乘法关断。初始数据能直
TDC1008J, TDC1009J, TDC1010J Parallel 8-, 12-, and 16-bit multiplier-accumulator (MAC_S) is a high-speed TTL (transistor- transistor logic) LSI (Large Scale Integrated Circuit ) Device. The low power and high performance of these devices is the result of TRW's proven new approach. The speed-power performance of the internal circuit has reached the level below 1 pico Joule per equivalent gate. These versatile arithmetic units can perform N × N multiplication and product accumulation. The number system can be two's complement or unsigned number. The output can be added or subtracted from the next product, or the accumulator can be turned off for multiplication only. The initial data can be straight