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§3.2.2 CPU 的中断控制信号:CPU 的中断请求信号是用可编程计数器/计时器(8253)来产生见图2·6,它由 CPU 的程序作成分频器。图中①信号是 IC127(8253)的 CK0端的输入信号,它是 T2μs 周期的时钟脉冲,作为8253的内部计数器1的计数脉冲。②信号是计数器1的输出 Q0,周期从147μs～500μs 之间可调。它是由这时候装置的图像扫描方式和探头的种类来决定的。下表是中断周期表。
§3.2.2 CPU Interrupt Control Signals: The CPU interrupt request signal is generated using a programmable counter / timer (8253) as shown in Figure 2.6, which is divided by the CPU’s programmer. The figure ① signal is the input signal of CK12 terminal of IC127 (8253). It is the clock pulse of T2μs cycle, which is used as the counting pulse of 8253 internal counter 1. ② signal is the output of counter 1 Q0, the cycle is adjustable from 147μs ~ 500μs. It is determined by the device’s image scanning method and the type of probe at this time. The following table is the interrupt cycle table.