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利用瞬间存在的信道实现数字通信时,在位同步问题上,必然会提出一些与连续通信信道有所不同的问题。其中的主要问题是要求一个小的位同步建立时问。本文将在具体条件下叙述这一问题,并介绍一种在实际应用中获得良好效果的位同步参考信号提取电路和快速数字锁相电路。这种电路取得的位同步建立时间满足系统位同步最大建立时间不大于3.3毫秒的要求。
When realizing the digital communication by using the instantaneous channel, some problems that are different from the continuous communication channel will inevitably come up in the bit synchronization problem. One of the major issues is asking for a small bit of synchronization when asked. This article describes the problem under specific conditions and introduces a bit synchronous reference signal extraction circuit and a fast digital phase lock circuit that achieve good results in practical applications. This circuit to obtain the bit synchronization to establish the time to meet the system maximum bit synchronization time is not greater than 3.3 milliseconds.