DFT Techniques in DSP Chip Core NDSP25

• 作 者: XUEJing BAIYong-qiang DENGZhen
• 机 构: ComputerSchoolofNorthwesternPolytechnicalUniversity
• 出 处: 医学信息：医学与计算机应用
• 发表日期: 2004年3期
• 关键词: 易测性设计 NDSP25芯片 自测 数字信号处理 NDSP25 Chip Coredesign for testability(DFT)built-in sel

Design for Testability (DFT) is critical in chip design. DFT techniques insert hardware logic to an original design,in order to improve testability of the chip, and thus reduce test cost significantly. In this paper, we introduces the most frequently used