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为了解决 IEEE 1 1 49.1边界扫描测试优化生成问题 ,提出了一种新型的测试矩阵压缩算法。该算法首先应用被测试电路板的结构信息构造有限制的短路故障模型 ,然后以有限制的短路故障模型为基础对测试矩阵进行压缩处理 ,尽可能剔除测试矩阵中的无效测试信息 ,从而达到测试优化生成的目的。理论分析及实验验证表明 ,该算法能够获得紧凑性指标相当优化的测试矩阵 ,实现较高的测试信息压缩率
In order to solve the IEEE 1 1 49.1 boundary scan test optimization generation problem, a new test matrix compression algorithm is proposed. The algorithm firstly constructs a limited short-circuit fault model by using the structural information of the tested circuit board, then compresses the test matrix based on the limited short-circuit fault model, and removes the invalid test information in the test matrix as much as possible so as to achieve the test Optimize the generation of the purpose. Theoretical analysis and experimental verification show that this algorithm can obtain a fairly optimized test matrix with compactness index and achieve high compression ratio of test information