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据仙童公司设在加州圣拉斐尔城的分立器件事业部的功率器件设计经理卡尔、A、萨沙曼说,仙童半导体公司的工程师借用三项超大规模集成加工技术制作出密度达280万单元/平方英寸的新一代功率MOS场效应晶体管电路。该集成密度大约是现行一代产品的三倍,比目前一些竞争公司正在研究的器件还要大一倍。仙童公司的第三代产品采用了投影光刻、等离子体腐蚀(用于接触窗口)、和快速热退火(形成极浅的结)等三项加工技术。据萨沙曼说,第三代功率MOS场效应管的导通电阻接近于理论极小值,即硅外延层的本征电导率可能采用通常工艺制作。“与目前的功率MOS FET技术相比,我们制作的器件的导通电阻更低,速度更高、芯片尺寸更小,而成本却更低。”
According to Karl A, Sashaman, the power device design manager for Fairchild’s discrete components division in San Rafael, California, Fairchild Semiconductor engineers borrowed three very large-scale integrated processing technologies to produce a density of 280 A new generation of power MOS field effect transistor circuits in million cells per square inch. The integration density is about three times the current generation of products, than some of the current competitors are two times the size of the device being studied. Fairchild’s third generation uses three processing technologies: projection lithography, plasma etching (for contact windows), and rapid thermal annealing (forming extremely shallow knots). According to Sashaman, the on-resistance of the third-generation power MOSFET is close to the theoretical minimum value, that is, the intrinsic conductivity of the silicon epitaxial layer may be fabricated by the conventional process. “Compared with the current power MOS FET technology, we produce devices with lower on-resistance, higher speed, smaller die size, and lower cost.”