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为探索通用可重构处理器(general-purpose reconfigurable processor,GReP)在序列密码算法中的研究与应用,本文对基于反馈移位寄存器(feedback shift register,FSR)的序列密码算法进行特征分析,结合GReP架构特性,提出掩码抽位式反馈函数计算模型,以A5算法为例,对算法中对性能影响大、复用性高且具有可重构性的关键部件提出并行化、流水化的优化设计方法,实现了算法的基于GReP的可重构优化.实验表明,基于GReP通用可重构处理器架构的A5算法可重构设计,比在Intel Atom 230平台上的吞吐率提高近一倍,GReP通用可重构处理器在提高序列密码算法处理能力与执行效率方面具有明显优势.
In order to explore the research and application of general-purpose reconfigurable processor (GReP) in the sequence cipher algorithm, this paper analyzes the sequence cipher algorithm based on the feedback shift register (FSR) GReP architecture, this paper puts forward a calculation model of mask-drawn feedback function. Taking the A5 algorithm as an example, this paper puts forward the parallelization and streamlining optimization of key components that have great influence on performance, high reusability and reconfigurability in the algorithm. Design method to achieve the algorithm based on GReP reconfigurable optimization experiments show that based on GReP general reconfigurable processor architecture A5 algorithm reconfigurable design than the Intel Atom 230 platform throughput rate nearly doubled, The GReP general-purpose reconfigurable processor has obvious advantages in improving the processing ability and execution efficiency of the sequence cipher algorithm.