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当数字信号处理器(典型地利用线性PCM编码数)同数字声带电话传送系统(利用u或A-法则编码数)接口时线性和压缩码之间的码转换是需要的。要叙述的码转换器是为了高速的多路信号处理器应用。双极型EFL~4电路可以供给位速率到42Mb。 接口电路包含两个12位移位寄存器,一个15位锁存器和有关的控制逻辑,如图1所示。根据外部的可编程序的静态逻辑进入这电路的串行数据可以按列出在表1中的13种方式之一来处理。输入和输出移位寄存器可以用独立的时钟速率工作,许可局部地非同步的工作。输入和输出按字传输速率同步。在一个有效的结构中,当允许各种各样的有用的码转换时,电路供给这种局部地非同步的接口。
Code conversion between linear and compressed codes is required when a digital signal processor (typically utilizing linear PCM encoding) interfaces with a digital voice over telephone transmission system (using u or A-law encoding) interfaces. The transcoder to be described is for high speed multiplexed signal processor applications. Bipolar EFL ~ 4 circuit can supply bit rate to 42Mb. The interface circuit contains two 12-bit shift registers, a 15-bit latch and associated control logic, as shown in Figure 1. Serial data entering this circuit based on external programmable static logic can be processed in one of the 13 ways listed in Table 1. The input and output shift registers can operate at independent clock rates, permitting the local asynchronous operation. Input and output are synchronized at the word transfer rate. In an efficient configuration, the circuit supplies this locally asynchronous interface while allowing a variety of useful transcoding.