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在多cell腔的场平坦度控制处理中,最重要的算法为除法运算,而传统整数除法算法采用多次相减和移位的方法来实现,其算法存在以下缺点:相减运算消耗大量时钟即“吃时钟”、每完成一次算法所需时钟周期不固定以及此算法在实际工程中不能有效工作。针对传统整数除法器的弊端,提出一种基于现场可编程门阵列(Field-Programmable Gate Array,FPGA)的循环型不可恢复除法器。设计的循环型不可恢复除法器通过改善程序结构和优化时序,实现除法运算速度的提高和固定运算所需时钟周期的目的。此算法通过Quartus II编译和综合,以及仿真工具Model Sim的仿真验证,达到预期功能效果,同时在上海光源增强器高频数字低电平控制器中被采用,实现场平坦度稳定度在±1.3%以内,完成每次运算所需35个时钟周期,优于设计指标。
In the multi-cell cavity field flatness control processing, the most important algorithm for the division operation, while the traditional integer division algorithm using multiple subtraction and shift method to achieve, the algorithm has the following disadvantages: the subtraction operation consumes a large number of clocks That is, “eat the clock ”, the clock cycle needed to complete each algorithm is not fixed and the algorithm can not work effectively in the actual project. Aiming at the disadvantages of traditional integer divider, this paper proposes a cyclic non-recoverable divider based on Field-Programmable Gate Array (FPGA). The design of the recoverable unrecoverable divider through the improvement of program structure and timing optimization, to achieve the division of speed and fixed computing required for the purpose of the clock cycle. The algorithm through the Quartus II compiler and synthesis, as well as the simulation simulation tool Model Sim simulation to achieve the desired functional effect, while the Shanghai light source intensifier high-frequency digital low-level controller is used to achieve field flatness stability of ± 1.3 Within 35% of the time required to complete each operation, better than the design specifications.