制造低功耗亚毫微秒静态随机存储器的亚微米自对准栅GaAs MES FET技术

• 作 者: K. L. Tan 邱素娟
• 出 处: 半导体情报
• 发表日期: 1988年05期
• 关键词: 静态随机存储器 沟道效应 栅长 自对准 埋层 阈值电压 开启电压 跨导 存取时间 均匀性

用自对准栅方法成功地开发了高性能亚微米栅GaAs MES FET工艺。为获得较高的栅开启电压,采用钨氮(WN_X)难熔金属做栅金属。在沟道下注入Be~+做P型埋层以减少短沟道效应和改善FET的均匀性。对于0.6μm栅长获得的跨导高达300ms/mm,阈值电压均匀,它的标准偏差在3in非掺杂LEC片上低达16.8mV,在13×13FET阵列上为7.6mV。用这种工艺我们已制造了功耗只有300mW、存取时间为1ns的256×4位的SRAM。

High-performance sub-micron gate GaAs MES FET technology has been successfully developed with a self-aligned gate method. In order to obtain a high gate-on voltage, a tungsten-nitrogen (WN_X) refractory metal is used as the gate metal. Be ~ + under the channel to do P-type buried layer to reduce the short-channel effect and improve FET uniformity. The transconductance obtained for 0.6 μm gate length was as high as 300 ms / mm with a uniform threshold voltage with a standard deviation of as low as 16.8 mV on a 3 in undoped LEC chip and 7.6 mV on a 13 × 13 FET array. With this process we have fabricated a 256 × 4-bit SRAM that consumes only 300mW and has an access time of 1ns.