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本文讨论了各种超高速数据采集系统、超高速任意波形合成系统等高速数字化应用系统的核心技术之一高速多体存储子系统的设计,介绍了适合于各种数据更新率为60MHz以上的超高速系统的一种新型多体并行存储系统电路结构。
This article discusses the design of high-speed multi-body memory subsystem, one of the core technologies of high-speed digital applications such as various ultra-high-speed data acquisition system, ultra-high speed arbitrary waveform synthesis system and so on. A Novel Multi-Body Parallel Memory System Circuit for High-Speed Systems.