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The original power control system applied in HIRFL-CSR utilizes the synchronous ADC and DAC to transmit and sample data. Its data transfer rate is 1 M/s and its data width is 16 bit. With the upgrade of the HIRFL-CSR system and start of the HITEL project, the power control system must
The original power control system applied in HIRFL-CSR utilizes the synchronous ADC and DAC to transmit and sample data. Its data transfer rate is 1 M / s and its data width is 16 bit. With the upgrade of the HIRFL-CSR system and start of the HITEL project, the power control system must