Novel multi-tap analog self-interference cancellation architecture with shared phase-shifter for ful

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Multi-tap analog self-interference(SI) cancellation structures adopt parallel taps to reconstruct and then cancel SI in full-duplex radios. Each tap is usually comprised of one fixed delay line, one variable attenuator, and one optional variable phase shifter. To balance the quantity of the variable phase shifters and the achievable SI cancellation(SIC) performance, this paper proposes a novel analog SIC cancellation structure,called shared-phase-shifter constrained multi-tap structure(SMTS). In the proposed architecture, all taps share one phase shifter to emulate the dominated phase offset of the SI channel, which reduces the complexity of the implementation of the multi-tap analog SIC structure and avoids the SIC performance degradation. Then, the proposed SMTS and the existing structures are compared in terms of SIC performance and power dissipation.Finally, extensive simulations show that SMTS provides the close-to-optimal SIC performance as well as the lowest power dissipation relative to the existing multi-tap structures. Multi-tap analog self-interference (SI) cancellation structures adopt parallel taps to reconstruct and then cancel SI in full-duplex radios. Each tap is usually comprised of one fixed delay line, one variable attenuator, and one optional variable phase shifter. To balance the quantity of the variable phase shifters and the achievable SI cancellation (SIC) performance, this paper proposes a novel analog SIC cancellation structure, called shared-phase-shifter constrained multi-tap structure (SMTS) share one phase shifter to emulate the dominated phase offset of the SI channel, which reduces the complexity of the implementation of the multi-tap analog SIC structure and avoids the SIC performance degradation. Then, the proposed SMTS and the existing structures are compared in terms of SIC performance and power dissipation. Finally, extensive simulations show that SMTS provides the close-to-optimal SIC performance as well as the lowest power dissipation re lative to the existing multi-tap structures.
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