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p+ 多晶硅栅中的硼在 Si O2 栅介质中的扩散会引起栅介质可靠性退化 ,在多晶硅栅内注入 N+ 的工艺可抑制硼扩散 .制备出栅介质厚度为 4 .6 nm的 p+栅 MOS电容 ,通过 SIMS测试分析和 I- V、C- V特性及电应力下击穿特性的测试 ,观察了多晶硅栅中注 N+工艺对栅介质性能的影响 .实验结果表明 :在多晶硅栅中注入氮可以有效抑制硼扩散 ,降低了低场漏电和平带电压的漂移 ,改善了栅介质的击穿性能 ,但同时使多晶硅耗尽效应增强、方块电阻增大 ,需要折衷优化设计 .
The diffusion of boron in the p + polysilicon gate in the Si O2 gate dielectric can degrade the gate dielectric reliability, and the diffusion of boron can be suppressed by implanting N + in the polysilicon gate. A p + gate MOS capacitor with a gate dielectric thickness of 4.6 nm , The effects of N + implantation process on gate dielectric properties of polysilicon gate were investigated by SIMS test, I-V and C-V characteristics and breakdown characteristics under electrical stress.The experimental results show that nitrogen can be injected into polysilicon gate Effectively suppress boron diffusion, reduce the drift of low-field leakage and flat-band voltage, improve the breakdown performance of the gate dielectric, but at the same time increase the depletion effect of polycrystalline silicon and increase the sheet resistance, which requires an eclectic optimized design.