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二度半二线大容量磁心存储器从功能上为计算机存储体系提供了很大的优点。设计这样一种存储器时存在许多困难,本文的目的就是解决这些困难,其中问题之一就是所谓“基准”噪音(pedestal noise)的抑制问题,这种噪音是由于那些读出-数位对线和其它元件特性的变化而引起的。一种具有定时控制和直流再生能力的变压器耦合基准噪音抑制线路,已经应用到131K字第二度半二线的磁心存储器中。该存储器已获得了满意的结果,它尽管使用了不用挑选的二极管和廉价的读出放大器,仍具有相当宽的工作域。
Second-and-a-half second-line high-capacity magnetic core memory provides a great advantage for the computer storage system. There are many difficulties in designing such a memory, and the object of this paper is to address these difficulties, one of which is the problem of suppression of so-called “pedestal noise” due to those read-digit-pairs and other Component characteristics caused by changes. A transformer coupled reference noise suppression circuit with timing control and DC regenerative capability has been applied to 131K word second-half and second-line core memories. This memory has yielded satisfactory results that despite its use of unchecked diodes and inexpensive sense amplifiers still have a fairly wide range of work.