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与美国军用标准-1750A指令组的需要相适应的L64500CPU芯片为一个32位结构,能控制16,24和32位操作。除了注意各种整数形式外,这种芯片还能用16或32位方式或一个扩展的48位方式进行定点和浮点的数学运算。该器件由标准单元所组成,兼有数据,指令和I/O处理功能。一块姊妹电路MBU(L64550存贮控制和程序块保护单元)合并了1750A技术要求中的存贮控制、程序块保护、总线判断和几个任选功能。这两种芯片是采用1.5μm、两层金属CMOS工艺来制造的,其工作频率为15到25MHz。目前这种元件采用144脚、管脚
The L64500CPU chip, which fits the needs of the US military standard -1750A instruction set, is a 32-bit architecture that controls 16, 24, and 32-bit operations. In addition to paying attention to various integer forms, the chip can also perform fixed-point and floating-point math operations in 16- or 32-bit mode or an extended 48-bit mode. The device consists of standard cells, both data, instructions and I / O processing functions. A sister circuit MBU, the L64550 Memory Control and Program Block Protection Unit, incorporates storage control, block protection, bus arbitration and several optional features in the 1750A specification. The two chips are fabricated in a 1.5μm, two-metal CMOS process that operates at 15 to 25MHz. At present, this component uses 144 feet, pins