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针对真随机数广泛应用的现状,基于振荡器采样和反馈电路竞争冒险机制,分析和设计了一款真随机数发生器。采用VHDL语言为描述工具,以纯数字IP核的形式提供了该发生器,并给出了一种与微控制器OC8051 IP核的挂接方法。选用Altera Cyclone-II FPGA开发板对随机数发生器进行验证,结果表明其逻辑和时序工作稳定,且随机数产生速率可达7.85M/s,完全通过7种随机性检测,可应用于实际的工程开发中。
Aiming at the current situation that true random numbers are widely used, a real random number generator is analyzed and designed based on the competition and adventure mechanism of oscillator sampling and feedback circuits. Using the VHDL language as a description tool, the generator is provided as a purely digital IP core and a method of hooking to the OC8051 IP core of a microcontroller is given. The Altera Cyclone-II FPGA development board is used to verify the random number generator. The results show that the logic and timing of the random number generator are stable. The random number generation rate can reach 7.85M / s, which can pass 7 randomness tests completely and can be applied to practical Engineering development.