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已经设计出一种作主存贮器用的半导体存贮阵列,对磁存贮工艺提出了强烈的经济竞争。本文提出的阵列是采用仅需4条互连引线的由三个最小几何尺寸MOS晶体管组成的新型高速动态存贮单元。单元集成为按512字×2位组织的带完整译码的1024位阵列。已经证明读周期或写周期为500毫微秒,存取时间为345毫微秒。在工作条件下,每位的平均功率损耗为200微瓦,每位的维持功率为30微瓦,每位的电池组功率为5微瓦。
A semiconductor memory array for primary storage has been devised that presents strong economic competition for magnetic storage processes. The proposed array is a new type of high speed dynamic memory cell consisting of three MOS transistors of the smallest geometrical size using only four interconnects. The unit is integrated into a 1024-bit array with full decoding organized in 512 words × 2 bits. It has been demonstrated that the read cycle or write cycle is 500 nanoseconds and the access time is 345 nanoseconds. Under working conditions, the average power loss per bit is 200 micro-watts with a sustain power of 30 micro-watts per bit and a battery power of 5 micro-watts per bit.