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（接上期）●缓存加速器为了保持在三条总线上的数据的一致性，康柏８路ＳＭＰ系统应用缓存加速器来减少处理器总线上不必要的阻塞。一个具有挑战性的ＳＭＰ设计是使所有处理器和Ｉ／Ｏ子程序来保持内存的一致性，这是一个典型保持数据一致性的方式。由于数据是被处理器总线上
(Continued) ● Cache Accelerator In order to maintain data consistency across all three buses, the Compaq 8-SMP system uses a cache accelerator to reduce unnecessary blockages on the processor bus. A challenging SMP design is to make all processors and I / O routines to maintain memory consistency, which is a typical way to maintain data consistency. Since the data is being processed on the bus