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本文详细介绍了有时钟和无时钟的两种 N沟道 MOS 静态4 K RAM。有时钟的器件是用三种电源(+12V,+5V,-5V)的 RAM,它的信号驱动用了自举电路,而为了降低功耗和允许无限延长芯选脉冲的持续时间,在存储矩阵中采用了维持电阻。无时钟的器件是单一电源(+5V)与 TTL完全相容的 RAM,为了提高速度和密集性采用了耗尽型负载电路。重点是给出工艺参数和性能以及考虑到包括内部时序和电路简图的电路设计。日益完善的 MOS 工艺和设计技术,使得有可能以两种方案研制出4096位静态 RAM:
This article details two N-channel MOS static 4 K RAMs with and without clock. Clocked devices are RAM with three power supplies (+ 12V, + 5V, -5V) and its signal-driven bootstrap circuit, and in order to reduce power consumption and allow indefinitely extended core-pulse duration, Matrix used to maintain the resistance. Clockless devices are single-supply (+ 5V) TTL fully compatible with RAM, in order to improve the speed and intensive use of depletion load circuit. The emphasis is on giving process parameters and performance as well as circuit designs that include internal timing and circuit diagrams. Increasingly sophisticated MOS technology and design techniques make it possible to develop 4096 static RAMs in two scenarios: