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本文给出了用于高速逻辑电路的两次硼离子注入 n 沟增强型 MOS EFT 器件的阈值电压和电流一电压特性。衬底采用 P 型(100)15Ω cm 的高阻材料,以降低结电容和阈值衬底敏感度。用浅的硼注入来提高阈值电压,之后,再进行一次较深的离子注入,以提高源—漏之间的穿通电压。这种方案特别有利于制作短沟道器件。我们对两次离子注入的器件进行了一维分析,以估测离子注入的剂量和能量对器件阈值电压的影响,同时我们还根据器件的几何尺寸进行了准二维分析,来了解器件的短沟道效应。为了得出电流一电压特性,一维分析用于线性区,而以泊松方程解为基础的准二维分析用于夹断区,以估测空间电荷限制电流。计算结果与实验室试制器件的特性非常符合。
This paper presents the threshold voltage and current-voltage characteristics of two boron ion implanted n-channel enhancement mode MOS EFT devices for high-speed logic circuits. The substrate uses a P-type (100) 15Ω cm high-resistance material to reduce junction capacitance and threshold substrate sensitivity. Use a shallow boron implant to increase the threshold voltage, followed by a deeper ion implant to increase the punch-through voltage between the source and drain. This solution is particularly advantageous for making short channel devices. We performed a one-dimensional analysis of two ion-implanted devices to estimate the effect of dose and energy of ion implantation on the threshold voltage of the device. We also performed a quasi-two-dimensional analysis of the device geometry to understand the short Channel effect. To derive current-voltage characteristics, one-dimensional analysis was used for the linear region, and quasi two-dimensional analysis based on the solution of the Poisson equation was used for the pinch-off region to estimate the space charge-limited current. The calculated results are in good agreement with the characteristics of laboratory prototype devices.