A CMOS low power,process/temperature variation tolerant RSSI with an integrated AGC loop

• 作 者: 雷倩倩 林敏 石寅
• 机 构: Department of Physics,Xi\'an Polytechnic University,Suzhou-CAS Semiconductors Integrated Technolog
• 出 处: Journal of Semiconductors
• 发表日期: 2013年03期
• 关键词: RSSI tolerant robustness consuming receiver adjust bandwidth linearity compensat

A low voltage low power CMOS limiter and received signal strength indicator(RSSI) with an integrated automatic gain control(AGC) loop for a short-distance receiver are implemented in SMIC 0.13μm CMOS technology.The RSSI has a dynamic range of more than 60 dB and the RSSI linearity error is within i0.5 dB for an input power from -65 to -8 dBm.The RSSI output voltage is from 0.15 to 1 V and the slope of the curve is 14.17 mV/dB while consuming 1.5 mA(I and Q paths) from a 1.2 V supply.Auto LNA gain mode selection with a combined RSSI function is also presented.Furthermore,with the compensation circuit,the proposed RSSI shows good temperature-independent and good robustness against process variation characteristics.

A low voltage low power CMOS limiter and received signal strength indicator (RSSI) with an integrated automatic gain control (AGC) loop for a short-distance receiver are implemented in SMIC 0.13 μm CMOS technology. RSSI has a dynamic range of more than 60 dB and the RSSI linearity error is within i0.5 dB for an input power from -65 to -8 dBm. The RSSI output voltage is from 0.15 to 1 V and the slope of the curve is 14.17 mV / dB while consuming 1.5 mA ( I and Q paths) from a 1.2 V supply. Auto LNA gain mode selection with a combined RSSI function is also presented. Still further, with the compensation circuit, the proposed RSSI shows good temperature-independent and good robustness against process variation characteristics.