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This paper presents a functional language for the unambiguous description of digital circuits,a me-thod and algorithms to obtain a standard-cell layout,and a comparative evaluation of the developed func-tional standard-cell placement technique.The presented placement scheme is different from traditionalmethods because the complete layout geometry is specified and constructed automatically from a function-al description.The construction relies on a translation that combines the simplicity of standard-cells withthe elegance of functional programming.An evaluation of the method introduced shows that the qualityof the resulting placement is close to the results achieved with simulated annealing while the computationtime is significantly less.Furthermore,the evaluation suggests to employ the functional placement me-thod in conjunction with low-temperature simulated annealing for running-time reduction and improved-results.
This paper presents a functional language for the unambiguous description of digital circuits, a me-thod and algorithms to obtain a standard-cell layout, and a comparative evaluation of the developed func-tional standard-cell placement technique. The presented placement scheme is different from traditionalmethods because the complete layout geometry is specified and constructed automatically from a function-al description.The construction relies on a translation that combines the simplicity of standard-cells with the elegance of functional programming. An evaluation of the method presents that that qualityof the resulting placement is close to the results achieved with simulated annealing while the computation time is significantly less. The more suggests, the functional placement me-thod in conjunction with low-temperature simulated annealing for running-time reduction and improved-results.