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从ASIC转向FPGA开发,将有助于开发人员解决功耗和成本设计问题。随着工艺技术向65nm以及更小尺寸的迈进,出现了两类关键的开发问题:待机功耗和开发成本。这两个问题在每一新的工艺节点上都非常突出,现在已经成为设计团队面临的主
Moving from ASIC to FPGA development will help developers address power and cost design issues. As process technology moves toward 65nm and smaller, two key development issues have emerged: standby power consumption and development costs. Both of these issues are outstanding at every new process node and have now become the main design team facing