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集成注入逻辑,这种双极型基片设计的新方法正以其高密度、毫微秒级的延迟以及微瓦的功耗等优良性能引起全世界逻辑设计者们的关注。最引人关切的是I~2L出色的门的布局,它从根本上消除了耗费面积和功率的电流源以及晶体管-晶体管逻辑中的负载电阻。由于这一简化,使得一个高产量的单片上能放到3,000个门或者10,000个存储单元,而且,速度-功耗积可降到0.13微微焦耳的惊人程度,要比现在的TTL好得多。因此,若门的工作速度与TTL相等,则几千个这种门的总功耗还不大于今天100个门的
With integrated injection logic, this new approach to bipolar substrate design is attracting the attention of logic designers worldwide with its superior performance of high density, nanosecond delay, and microwatt power dissipation. The most intriguing is the I ~ 2L's excellent gate layout, which essentially eliminates the area and power consuming current sources and the load resistance in transistor-transistor logic. Because of this simplification, a high-yield monolithic device can be placed in 3,000 gates or 10,000 cells and the speed-power product can be reduced to a staggering 0.13 pico-joule, much better than the current TTL . Therefore, if the door's working speed is equal to the TTL, then the total power consumption of thousands of such doors is not greater than today's 100 doors