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V形栅的设计思想可由图2表明,其原理已在Electron.Lett.1974,[10],P.478一文中阐明。用厚0.5到1微米、掺杂浓度n(∽－)10~(17)厘米~(-3)的外延层,仅将栅区内的沟道减薄到使夹断电压为2伏,这对射频小功率器件和低串联电阻是最佳的。获得V形刻槽的重要条件是GaAs片子上沟道的取向。利用腐蚀速度与晶向有关,用反应限制的腐蚀(NaOH-H_2O_2-H_2O)可得到图2所示的结构。用2微米的光致抗蚀剂掩模作为化学腐蚀的掩蔽,按剥离工艺,在直流溅射后,腐蚀清洗和蒸发栅金属。楔形栅延伸到沟道,在有源沟道区中产生很短的高场区,在高场区内载流子漂移速度达到饱和。由于未
The design concept of a V-shaped gate can be shown in Fig. 2, the principle of which is set forth in Electron. Lett. 1974, [10], P.478. Using an epitaxial layer with a thickness of 0.5 to 1 μm and a thickness of n (∽-) of 10 to (17) cm -3, only the channel in the gate region is thinned so that the pinch-off voltage is 2 volts, which For RF low-power devices and low series resistance is the best. An important condition for obtaining a V-shaped groove is the orientation of the channel on the GaAs film. The corrosion rate is related to the crystal orientation, and the structure shown in Fig. 2 can be obtained by reaction-limited etching (NaOH-H 2 O 2 -H 2 O). Using a 2 micron photoresist mask as a mask for chemical etching, the gate metal is etched and etched by a lift-off process following DC sputtering. The wedge-shaped gate extends to the channel, creating a very short high field region in the active channel region, where the carrier drift speed is saturated. As yet