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以 Pb Ti O3(PT)作为种子层 ,在 Si衬底上用改进的溶胶凝胶法制备了 PZT薄膜 ,并用 RIE法刻蚀形成 MFM(金属铁电层金属 )结构的电容 ,以用于铁电随机存取存储器 (Fe RAM)中。测得 PZT薄膜相对介电常数、矫顽场和剩余极化强度分别为 10 0 0 ,30 k V/ cm和 16 μC/ cm2 ,漏电流在 0 .1n A / cm2 量级 ,达到 Fe RAM的应用要求。铁电膜与CMOS电路集成时对铁电膜的铁电性可能造成的工艺损伤(如刻蚀损伤、氢损伤和应力损伤等 )的物理机制进行了初步研究和讨论 ,并提出了一些初步的解决途径
PZT thin films were prepared on Si substrates by a modified sol-gel process using PbTiO3 (PT) as a seed layer and a capacitor of MFM (metal ferroelectric layer metal) structure was etched by RIE to form an iron In electrically random access memory (FeRAM). The relative dielectric constant of the PZT thin film was measured. The coercive field and remanent polarization were 10 0 0, 30 k V / cm and 16 μC / cm 2, respectively, and the leakage current was on the order of 0 1 n A / cm 2, reaching Fe RAM Application requirements. The integration of ferroelectric film with CMOS circuit is a preliminary study and discussion on the physical mechanism of the process damage (such as etch damage, hydrogen damage and stress damage) caused by the ferroelectricity of the ferroelectric film. Some preliminary Solutions