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Viterbi作为一种最大似然译码算法广泛应用在数字地面视频广播中,但由于其较高算法复杂程度,对实现高速低功耗时延小且逻辑结构简单的译码器带来了挑战。首先为了实现高速的Viterbi译码器,ACSU采用全并行结构,度量值的溢出控制采用取模归一化方法,并简化比较器。其次为了实现低功耗时延小且控制逻辑简单的Viterbi译码器,SMU采用改进的前向追溯结构,只用一组单口的RAM实现译码输出。该译码器在Xilinx Virtex6上实现并验证通过,并具有较好的译码性能。
As a kind of maximum likelihood decoding algorithm, Viterbi is widely used in digital terrestrial video broadcasting. However, because of its high algorithm complexity, Viterbi poses a challenge to the decoder which has the advantages of low speed and low power delay and simple logic structure. First of all, in order to realize the high-speed Viterbi decoder, ACSU adopts the all-parallel structure. The overflow control of the measure adopts the modulo normalization method and simplifies the comparator. Secondly, in order to realize the Viterbi decoder with low power dissipation and simple logic control, SMU uses an improved forward trace structure and uses only a single port of RAM to realize the decoding output. The decoder is implemented and validated on Xilinx Virtex6 and has good decoding performance.